SiGe Source-Based Epitaxial Layer-Encapsulated TFET and its Application as a Resistive Load Inverter
- Authors: Radhe Gobinda Debnath1, Srimanta Baishya2
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View Affiliations Hide AffiliationsAffiliations: 1 Department of Electronics and Communication Engineering, National Institute of Technology, Silchar, Assam, India 2 Department of Electronics and Communication Engineering, National Institute of Technology, Silchar, Assam, India
- Source: Nanoelectronic Devices and Applications , pp 218-230
- Publication Date: July 2024
- Language: English
SiGe Source-Based Epitaxial Layer-Encapsulated TFET and its Application as a Resistive Load Inverter, Page 1 of 1
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In this study, a SiGe source-based epitaxial layer-encapsulated TFET (SiGe source ETLTFET) is developed, and the performance of the device is examined by optimizing various design parameters, including the epitaxial layer thickness (tepi), gateto-source overlap length (Lov), Ge mole fraction, and source doping concentration. The average subthreshold swing (SSavg) and ON-OFF current ratio are used to evaluate the devices performance. The results show a superior performance of SiGe source ETLTFET compared with its homojunction counterpart. Furthermore, to demonstrate the possibilities for using the proposed device in a logic circuit, a resistive load inverter is designed using the n-type ETLTFET.
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